Job Requirements
Arlington, VA Annapolis Junction, MD Denver, CO
Top Secret/SCI Polygraph not specified
Career Level not specified
Salary not specified
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Job Description
We are seeking an experienced Senior FPGA Design Engineer with strong expertise in RTL development, SystemVerilog/VHDL, and Python to support high-speed networking and mission-critical systems in a classified environment. This role involves designing advanced FPGA solutions, developing custom IP, integrating high-performance interfaces, and collaborating with multidisciplinary teams to deliver secure, high-reliability products.
Key Responsibilities
Design, develop, and implement RTL for high-speed networking applications.
Create custom IP cores and integrate third-party IP into complex FPGA designs.
Define and implement timing constraints, ensuring full timing closure on high-performance designs.
Collaborate closely with hardware and software engineers in a classified environment.
Support verification, validation, and debugging activities throughout the design lifecycle.
Oversee FPGA implementation, synthesis, place-and-route, and optimization for performance, area, and power.
Required Qualifications
Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
7+ years of hands-on FPGA development experience.
Strong proficiency in SystemVerilog and/or VHDL.
Demonstrated experience with Xilinx and/or Intel FPGA design tools (Vivado, Quartus, etc.).
Experience with high-speed interfaces such as PCIe, Ethernet, DDR, and similar technologies.
Proficiency in Python for automation, scripting, or design support tasks.
Active TS//SCI security clearance (required).
Desired Skills
Experience developing FPGA solutions for network security applications.
Familiarity with networking standards, switching, routing, or packet-processing architectures.
Experience with scripting languages such as Python and Tcl for design automation and workflow optimization.
Understanding of hardware security principles, anti-tamper measures, or secure FPGA architectures.
Key Responsibilities
Design, develop, and implement RTL for high-speed networking applications.
Create custom IP cores and integrate third-party IP into complex FPGA designs.
Define and implement timing constraints, ensuring full timing closure on high-performance designs.
Collaborate closely with hardware and software engineers in a classified environment.
Support verification, validation, and debugging activities throughout the design lifecycle.
Oversee FPGA implementation, synthesis, place-and-route, and optimization for performance, area, and power.
Required Qualifications
Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
7+ years of hands-on FPGA development experience.
Strong proficiency in SystemVerilog and/or VHDL.
Demonstrated experience with Xilinx and/or Intel FPGA design tools (Vivado, Quartus, etc.).
Experience with high-speed interfaces such as PCIe, Ethernet, DDR, and similar technologies.
Proficiency in Python for automation, scripting, or design support tasks.
Active TS//SCI security clearance (required).
Desired Skills
Experience developing FPGA solutions for network security applications.
Familiarity with networking standards, switching, routing, or packet-processing architectures.
Experience with scripting languages such as Python and Tcl for design automation and workflow optimization.
Understanding of hardware security principles, anti-tamper measures, or secure FPGA architectures.
group id: 91094950