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Principal ASIC/FPGA Design Engineer - Digital Hardware / Defense

Moseley Technical Services, Inc.

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Job Requirements

Scottsdale, AZ
Top Secret Polygraph Unspecified
Career Level not specified
Salary not specified
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Job Description

Principal ASIC/FPGA Design Engineer

Digital Hardware | Defense Systems

Scottsdale, AZ

Pay Estimated: $108.16 - $113.16/Hour

U.S. Citizenship is required by Federal Law

We are hiring a Principal ASIC/FPGA Design Engineer to lead advanced digital hardware design, development, and verification activities supporting complex defense engineering programs. This role supports the complete ASIC/FPGA development life cycle, including hardware architecture, system simulation, logic synthesis, place and route, timing analysis, power optimization, and technical leadership, with responsibility for engineering proposals, subcontract oversight, and eligibility to obtain a DoD Top Secret/Sensitive Compartmented Information (TS/SCI) security clearance.

Responsibilities:
  • Lead the definition, design, verification, and documentation of Application-Specific Integrated Circuit (ASIC) and Field-Programmable Gate Array (FPGA) solutions throughout the hardware development life cycle.
  • Establish digital hardware architectures, module interfaces, system simulations, and detailed device design approaches.
  • Evaluate ASIC/FPGA implementation workflows, including high-level design, logic synthesis, place and route, timing analysis, and power utilization.
  • Develop test and simulation plans, establish functional verification criteria, analyze test results, and evaluate hardware performance.
  • Assess semiconductor foundry technologies, device libraries, simulation tools, and vendor capabilities to support hardware development.
  • Lead technical subcontract management for medium to large subcontracts, including Statements of Work (SOW), proposal evaluations, source selection, technical oversight, and subcontractor deliverable acceptance.
  • Develop, maintain, and improve ASIC/FPGA engineering processes, standards, procedures, and technical workflows throughout the program life cycle.
  • Generate technical engineering deliverables in accordance with established development standards and organizational processes.
  • Lead technical feasibility assessments by analyzing customer proposals, engineering specifications, technical documentation, and application requirements.
  • Select hardware components and equipment based on technical specifications, performance, and reliability requirements.
  • Establish ASIC/FPGA technical approaches for large engineering proposals and support technical proposal development and coordination for medium-sized opportunities.
  • Participate in multidisciplinary and multi-company Integrated Product Teams (IPTs) and engineering working groups.
  • Provide technical leadership, supervision, and mentoring to junior engineers and engineering teams as assigned.
  • Establish technical objectives, manage engineering scope, and resolve unusually complex design and development challenges.
  • Apply engineering project management principles, including Schedule Performance Index (SPI), Cost Performance Index (CPI), Earned Value Management (EVM), Cost Account Management (CAM), and Statistical Process Control (SPC).
  • Serve as a technical consultant to engineering management and customers, providing guidance on advanced ASIC/FPGA applications and development strategies.
  • Support engineering program leadership activities, potentially serving as Deputy Program Manager Engineering (DPME).
  • Develop innovative engineering solutions and advanced technical applications that support new business opportunities.
  • Identify opportunities to apply artificial intelligence (AI) to improve engineering processes, productivity, and innovation.

Qualifications:
  • U.S. Citizenship is required by Federal Law
  • Ability to obtain a U.S. Department of Defense (DoD) Top Secret/Sensitive Compartmented Information (TS/SCI) security clearance within a reasonable period following hire.
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related Science, Engineering, or Mathematics field with 10+ years of relevant experience; OR a Master's degree with 8+ years of relevant experience.
  • Extensive experience with ASIC/FPGA engineering principles, digital hardware design, development processes, and verification methodologies.
  • Demonstrated expertise in ASIC/FPGA architecture, system simulation, detailed hardware design, and module interface development.
  • Experience evaluating digital hardware implementation workflows, including synthesis, place and route, timing analysis, and power utilization.
  • Experience developing verification plans, analyzing simulation results, and evaluating hardware performance.
  • Ability to evaluate engineering specifications, semiconductor technologies, vendor capabilities, and hardware development feasibility.
  • Experience applying established engineering standards, organizational processes, and development methodologies throughout complex hardware programs.
  • Knowledge of technical subcontract management, engineering proposal development, and vendor evaluation processes.
  • Demonstrated understanding of engineering project leadership principles, including SPI/CPI, Earned Value Management, Cost Account Management, and Statistical Process Control.
  • Ability to manage engineering scope growth, establish technical objectives, and develop solutions to unusually complex technical challenges.
  • Experience providing technical consultation, presenting engineering recommendations, and communicating design decisions, risks, and corrective actions to management and customers.
  • Proficiency with Microsoft Office applications.

Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer.
group id: MOSELEY