R -6B1DI5-Elect Design and Analysis Engr 5 - 64Y-Microelectronic

Onsite El Segundo CA | Active Secret Clearance Required to start The contractor will inherit FPGA top-level design and be responsible for creating and adding new functional blocks and interfaces, including integrating third-party and in-house IP cores. Responsibilities include updating constraint files, performing synthesis, simulation, and Place & Route processes to ensure timing closure and...