Job Requirements
El Segundo, CA
Secret Polygraph not specified
Senior Level Career (10+ yrs experience)
$200,000 - $230,000
Job Description
Required Skills:
• 5+ years of FPGA and/or ASIC design experience;
• strong Xilinx/AMD Vivado experience;
• Experience with Versal family devices;
• Verilog/SystemVerilog HDL proficiency required;
• Advanced FPGA implementation skills (synthesis, timing closure, constraints);
• Active U.S. security clearance
Preferred Skills:
• 2+ years of FPGA design experience;
• strong Xilinx/AMD Vivado experience;
• Verilog/SystemVerilog proficiency;
• Advanced FPGA implementation skills (synthesis, timing closure, constraints);
Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience (e.g. PhD+9 years' related work experience, Master+12 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
• 5+ years of FPGA and/or ASIC design experience;
• strong Xilinx/AMD Vivado experience;
• Experience with Versal family devices;
• Verilog/SystemVerilog HDL proficiency required;
• Advanced FPGA implementation skills (synthesis, timing closure, constraints);
• Active U.S. security clearance
Preferred Skills:
• 2+ years of FPGA design experience;
• strong Xilinx/AMD Vivado experience;
• Verilog/SystemVerilog proficiency;
• Advanced FPGA implementation skills (synthesis, timing closure, constraints);
Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience (e.g. PhD+9 years' related work experience, Master+12 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
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