Digital Engineer 3

Chipton-Ross is seeking a Digital Engineer 3 for a contract opportunity in Linthicum, MD.

• Bachelors in STEM discipline with a minimum 6 to 8 years of related experience, or a Master's Degree with 6 years of related experience, or a PhD with 3 years of related experience
• Digital ASIC or FPGA and/or development experience and knowledge essential
• Candidate must have good communication skills, strong interpersonal skills, and good oral and written presentation skills
• Must be U.S Citizen

• Develop digital logic designs for space applications such as satellite command and control and sensor data processing
• Design, development, creation and modification of digital logic designs implemented with Xilinx and Microsemi FPGA IDEs
• Simulation and verification of FPGA logic designs, compliance requirements, and supporting validation at the system level
• Work with members of multi-functional teams to develop innovative solutions
• Clear and effective communication to cross-functional team members
• Documentation of design and analysis reports as well as test reports

• Active DoD Top Secret Clearance
• Experience translating customer requirements into functional block diagrams that can be realized as FPGAs or other Digital Logic Circuit Card Assemblies
• Strong experience with Matlab and Simulink modeling and programming
• Develops detailed specifications from high level design goals and performs analysis of the hardware, system environment and design goals to enable selection and implementation of the desired system topology
• Can clearly present assigned work at program technical reviews, proposals, or other technical meetings
• Possesses strong interpersonal skills to work effectively within a development team to understand system level inter-dependencies and design constraints
• Conduct trade studies, identify and present alternate design options
• Experience with Systems Engineering principles
• Experience with the following FPGA families , tools and Interfaces is a plus.
• AMD Xilinx: Ultrascale, Ultrascale+ and Versal FPGAs
• Experience Using the Vivaldo tool set
• Experience developing 10G-40G SERDES
• Familiar with Questa simulation environment
• DSP experience a plus
• MicroChip: RTG4 family of FPGAs
• Utilize Libero tool set
• Developed 1G SERDES
• Familiar with Questa simulation environment

Bachelor's Degree is required.

School must be accredited.



5/40 workweek.

• Employment will be contingent on clearing a drug screen and background check. Both must clear prior to start date.
• Candidates responding to this posting must currently possess the eligibility to work in the United States. No third parties please.