Job Requirements
San Diego, CA
Secret Polygraph Unspecified
Career Level not specified
Salary not specified
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Job Description
PDS Defense, Inc. is seeking a Digital Engineer 3, in San Diego, CA. Job ID#218908
Pay Rate: $99 - $104/hr
Job Description:
• Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases.
• Work using FPGA programming development tools and environments
• Work with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & Test
• Work in waterfall or Agile software development environment
• Analyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.
Basic Qualifications for Digital Engineer:
• BS + 5 years of experience in related STEM field; MS + 3 years of experience.
• Significant hands-on current experience in the field of VHDL design.
• Candidate must have excellent written and communication skills and be able to work independently and within groups.
• Candidate must have working knowledge of formal engineering development process, VHDL design and verification.
• An active Secret Clearance is required to start.
Preferred Qualifications for Digital Engineer:
• 8 or more years of professional technical experience.
• Experience with VHDL design and OSVVM verification for FPGA firmware
• Experience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices.
• Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet)
• Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSim
• Knowledgeable in FPGA physical constraints and achieving timing closure.
• Generation of Test benches and support of formal VHDL Verification.
• Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers.
• Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications.
• Candidate should have hands on experience with DoD communications systems.
Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.
Military connected talent encouraged to apply.
VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled
To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit http://www.tadpgs.com/candidate-privacy/ or https://pdsdefense.com/candidate-privacy/
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
Pay Rate: $99 - $104/hr
Job Description:
• Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases.
• Work using FPGA programming development tools and environments
• Work with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & Test
• Work in waterfall or Agile software development environment
• Analyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.
Basic Qualifications for Digital Engineer:
• BS + 5 years of experience in related STEM field; MS + 3 years of experience.
• Significant hands-on current experience in the field of VHDL design.
• Candidate must have excellent written and communication skills and be able to work independently and within groups.
• Candidate must have working knowledge of formal engineering development process, VHDL design and verification.
• An active Secret Clearance is required to start.
Preferred Qualifications for Digital Engineer:
• 8 or more years of professional technical experience.
• Experience with VHDL design and OSVVM verification for FPGA firmware
• Experience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices.
• Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet)
• Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSim
• Knowledgeable in FPGA physical constraints and achieving timing closure.
• Generation of Test benches and support of formal VHDL Verification.
• Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers.
• Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications.
• Candidate should have hands on experience with DoD communications systems.
Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.
Military connected talent encouraged to apply.
VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled
To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit http://www.tadpgs.com/candidate-privacy/ or https://pdsdefense.com/candidate-privacy/
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
- The California Fair Chance Act
- Los Angeles City Fair Chance Ordinance
- Los Angeles County Fair Chance Ordinance for Employers
- San Francisco Fair Chance Ordinance
group id: 9117PDSD