Job Requirements
Camden, NJ
Secret Polygraph not specified
Mid Level Career (5+ yrs experience)
Salary not specified
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Job Description
Job Title: Electrical Engineering
Pay rate up to $83.94/hr. range
Location: Camden, New Jersey, 08103
Contract: 12 Months
Contract to Hire
***Must have an active U.S. Government Secret clearance that is in-scope (granted or renewed in the last 6 years)
Benefits: (start on 1st week)
Belcan provides a competitive pay and benefits package. We consider several factors when extending an offer, including but not limited to education, experience, geographic location, and discipline.
Benefits offered may include health care, dental, vision, life insurance; 401(k); education assistance; paid time off including PTO, holidays, and any other paid leave required by law.
Description:
Lead FPGA Engineer reporting to the Manager of Engineering (ASIC/FPGA), responsible for architecting, implementing, and debugging FPGA designs for defense applications. Work focuses on Ethernet, I2C, SPI, and AXI protocols, ensuring robust performance and reliability. Role utilizes advanced EDA toolchains including Mentor Graphics (Questa, QVIP, UVM, CDC/RDC, linting), Synopsys (Design Compiler, PrimeTime, Synplify), and Xilinx/Intel/Microchip tools (Vivado, Quartus, Libero). This is a high-impact position supporting secure communications and national security systems, ensuring high-quality FPGA delivery across mission-critical defense programs.
Essential Functions:
Derive FPGA design specifications from system requirements.
Develop detailed FPGA architecture for implementation.
Implement design in RTL (VHDL) and perform module level simulations.
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis. (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA.
Generate verification test plans and perform End to End Simulations
Support Board, FPGA bring up.
Validate design through HW/SW integration test with test equipment.
Support product collateral for NSA certification.
Qualifications:
*Bachelor of Science (BS) 4-year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology. (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
*3-5+ years" experience designing FPGA products with VHDL.
*Experience with Xilinx FPGAs and Vivado.
*Experience with Revision control system.
*Experience with Earned Value Management. (EVM)
*Good written, verbal, and presentation skills.
*Active DoD Security Clearance.
Preferred Additional Skills:
*Experience with mapping algorithms to architecture.
*Experience in C++. (OOP)
*Experience with any of protocols: Ethernet, TCP/IP, PCIe, NVMe, USB.
*Experience with Xilinx SoC design with SDKs and PetaLinux OS.
*Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult.
Pay rate up to $83.94/hr. range
Location: Camden, New Jersey, 08103
Contract: 12 Months
Contract to Hire
***Must have an active U.S. Government Secret clearance that is in-scope (granted or renewed in the last 6 years)
Benefits: (start on 1st week)
Belcan provides a competitive pay and benefits package. We consider several factors when extending an offer, including but not limited to education, experience, geographic location, and discipline.
Benefits offered may include health care, dental, vision, life insurance; 401(k); education assistance; paid time off including PTO, holidays, and any other paid leave required by law.
Description:
Lead FPGA Engineer reporting to the Manager of Engineering (ASIC/FPGA), responsible for architecting, implementing, and debugging FPGA designs for defense applications. Work focuses on Ethernet, I2C, SPI, and AXI protocols, ensuring robust performance and reliability. Role utilizes advanced EDA toolchains including Mentor Graphics (Questa, QVIP, UVM, CDC/RDC, linting), Synopsys (Design Compiler, PrimeTime, Synplify), and Xilinx/Intel/Microchip tools (Vivado, Quartus, Libero). This is a high-impact position supporting secure communications and national security systems, ensuring high-quality FPGA delivery across mission-critical defense programs.
Essential Functions:
Derive FPGA design specifications from system requirements.
Develop detailed FPGA architecture for implementation.
Implement design in RTL (VHDL) and perform module level simulations.
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis. (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA.
Generate verification test plans and perform End to End Simulations
Support Board, FPGA bring up.
Validate design through HW/SW integration test with test equipment.
Support product collateral for NSA certification.
Qualifications:
*Bachelor of Science (BS) 4-year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology. (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
*3-5+ years" experience designing FPGA products with VHDL.
*Experience with Xilinx FPGAs and Vivado.
*Experience with Revision control system.
*Experience with Earned Value Management. (EVM)
*Good written, verbal, and presentation skills.
*Active DoD Security Clearance.
Preferred Additional Skills:
*Experience with mapping algorithms to architecture.
*Experience in C++. (OOP)
*Experience with any of protocols: Ethernet, TCP/IP, PCIe, NVMe, USB.
*Experience with Xilinx SoC design with SDKs and PetaLinux OS.
*Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult.
group id: 10180554
