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VHDL Digital Engineer

Indotronix International Corp

Posted today

Job Requirements

San Diego, CA
Secret Polygraph Unspecified
Career Level not specified
Salary not specified
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Job Description

Indotronix is seeking an :Software Engineer-Test & Verification 4
Location:-San Diego California
Clearance: Active Secret

Job Description

Seeking a Senior FPGA Verification Lead Engineer to support the design verification and validation of FPGA-based software-defined radio and DoD communication systems. This role will provide hands-on technical leadership, mentor verification engineers, and drive FPGA verification activities throughout the product lifecycle.

Key Responsibilities
  • Lead and mentor a team of 2-4 VHDL verification engineers
  • Define and maintain FPGA and digital logic verification frameworks and architectures
  • Develop verification plans based on design requirements and technical specifications
  • Simulate, verify, and validate FPGA logic designs and system functionality
  • Analyze and debug simulation failures, identify root causes, and support issue resolution with design teams
  • Perform regression testing and generate verification metrics and status reports
  • Support FPGA product lifecycle activities including requirements, design, verification, and production release
  • Coordinate with cross-functional engineering teams and program management to ensure project execution and schedule compliance
  • Support technical planning, task estimation, forecasting, and schedule management
  • Participate in design reviews, verification reviews, and technical meetings

Required Skills
  • Strong experience in VHDL design and verification methodologies
  • Experience with FPGA-based DoD communication or software-defined radio systems
  • Experience developing verification plans, test benches, functional tests, and bus functional models
  • Proficiency with Siemens Questa Simulator
  • Strong analytical, troubleshooting, and debugging skills
  • Experience managing technical tasks, schedules, and deliverables
  • Strong communication and collaboration skills in a team environment
  • Ability to obtain and maintain a U.S. Security Clearance

Preferred Skills
  • Active Security Clearance
  • Experience leading FPGA verification teams
  • Experience with OSVVM verification methodology
  • Experience with Linux scripting languages such as Perl, TCL, Bash, or Makefile
  • Experience with Siemens formal verification tools including Lint, Inspect, and CDC
  • Experience with cost tracking and metric reporting
  • Ability to obtain Special Access Program clearances

Education / Experience

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field with typically 12+ years of professional experience in FPGA verification, digital logic design, or related engineering disciplines.
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