Posted today
Secret
Unspecified
Unspecified
Tysons, VA (On-Site/Office)
Zachary Piper Solutions is seeking a Senior FPGA Engineer to support a Government Consulting partner located in Tysons Corner, VA (located in Lanham, MD until Summer 2026) through a 100% onsite work environment (hybrid flexibility). The Senior FPGA Engineer will design, test, and integrate advanced FPGA - based processing solutions supporting radar, RF, and secure communication systems.
Responsibilities:
Qualifications:
Compensation:
Keywords: FPGA, VHDL, Verilog, Xilinx, AMD, Zynq, UltraScale, RFSoC, Intel FPGA, Altera, SDR, DSP, radar signal processing, beamforming, pulse compression, MTI, MTD, digital communications, modulation, demodulation, JESD204B, JESD204C, SERDES, LVDS, Ethernet 10G, 40G, 100G, MATLAB, Python, TCL, Vivado, Vitis, ModelSim, QuestaSim, Synplify, RF systems, EW systems, ADC, DAC, mixed - signal integration, timing closure, static timing analysis, HDL simulation, hardware - in - the - loop, spectrum analyzers, oscilloscopes, vector signal analyzers, DoD programs, MIL - STD, DO - 254, DevOps, AXI interfaces, high - speed data paths, waveform processing.
Responsibilities:
- Develop and implement FPGA designs for radar and communications DSP functions including beamforming, pulse compression, MTD/MTI, and high - rate digital data pipelines.
- Build firmware modules for SDR and digital comms systems such as modulation, filtering, channelization, timing recovery, and error correction.
- Integrate and optimize high - speed digital interfaces (SERDES, JESD204B/C, LVDS, Ethernet 10/40/100G, custom links).
- Create HDL testbenches and perform simulation using Vivado, ModelSim, or QuestaSim.
- Execute timing closure, static timing analysis, and hardware - in - the - loop testing.
- Interface FPGA logic with ADC/DAC hardware, RF/mixed - signal components, embedded processors, and high - speed digital boards.
- Conduct hands - on lab testing using oscilloscopes, spectrum analyzers, vector signal analyzers, and other RF test equipment.
- Diagnose fielded system issues, perform root - cause analysis, and implement corrective action.
- Maintain FPGA image releases and collaborate with DevOps on build automation.
- Generate engineering documentation including ICDs, verification plans, and test reports that align with federal and customer standards.
Qualifications:
- 10+ years of FPGA development experience within radar, RF, EW, or high - performance DSP environments.
- Strong experience with VHDL/Verilog and FPGA platforms such as Xilinx/AMD Zynq, UltraScale, RFSoC or Intel/Altera devices.
- Expertise in DSP architectures, high - speed digital interfaces, timing analysis, and verification workflows.
- Ability to produce clear, customer - ready technical documentation.
- Ability to obtain and maintain a U.S. Secret security clearance.
- Prior support of DoD radar, tactical communications, or EW programs.
- Experience with RFSoC, multi - channel ADC/DAC systems, or mixed - signal integrations.
- Familiarity with Xilinx GTX/GTY transceivers and high - speed switching technologies.
- Knowledge of DO - 254, MIL - STD, or related government design - assurance standards.
- Scripting experience (Python, MATLAB, TCL) for automation or analysis
- Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
Compensation:
- Salary Range: negotiable depending on experience
- Comprehensive Benefits: Medical, Dental, Vision, unlimited PTO, Sick Leave (as required by law), Paid Holidays
- Relocation assistance, RSU
- Clearance Level: Must be eligible to work in the United States and obtain/maintain an Active Secret clearance
- Location: 100% onsite in Tysons Corner, VA (Lanham, MD until summer 2026)
Keywords: FPGA, VHDL, Verilog, Xilinx, AMD, Zynq, UltraScale, RFSoC, Intel FPGA, Altera, SDR, DSP, radar signal processing, beamforming, pulse compression, MTI, MTD, digital communications, modulation, demodulation, JESD204B, JESD204C, SERDES, LVDS, Ethernet 10G, 40G, 100G, MATLAB, Python, TCL, Vivado, Vitis, ModelSim, QuestaSim, Synplify, RF systems, EW systems, ADC, DAC, mixed - signal integration, timing closure, static timing analysis, HDL simulation, hardware - in - the - loop, spectrum analyzers, oscilloscopes, vector signal analyzers, DoD programs, MIL - STD, DO - 254, DevOps, AXI interfaces, high - speed data paths, waveform processing.
group id: 10430981
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