Posted today
Secret
Unspecified
Unspecified
Engineering - Mechanical
Dedham, MA (On-Site/Office)
TITLE: FPGA Design Engineer
ONSITE LOCATION: Dedham, MA 02026
SCHEDULE:9/80
Required: Secret Clearance
W2 Hourly Contract Only
Hourly Rate Range: $65.00 - $77.80 with limited benefits
*** W2 hourly Contract Only with a possible extension, No 1099, No third parties, no C2C.
No exceptions (Sorry) DoD Secret Clearance is Required ***
We have an opening for a Secret Cleared FPGA Design Engineer responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.
We encourage you to apply if you have any of these preferred skills or experiences: Experience with Zync UltraScale+ MPSoC or similar FPGAs, Vivado or similar tools; VHDL or similar languages.
REQUIREMENTS
If you or anyone you know is interested in hearing more about this position, please email your resume and availability to Meredith Baldwin at Mbaldwin@geologics.com
*Rates listed are not a guarantee of salary/rate. Rate offered at time of hire will depend on many factors including education, experience, interview results and skill level
GeoLogics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran
Meredith Baldwin
Recruiter
(703) 891-6115
Mbaldwin@geologics.com
#CJ
ONSITE LOCATION: Dedham, MA 02026
SCHEDULE:9/80
Required: Secret Clearance
W2 Hourly Contract Only
Hourly Rate Range: $65.00 - $77.80 with limited benefits
*** W2 hourly Contract Only with a possible extension, No 1099, No third parties, no C2C.
No exceptions (Sorry) DoD Secret Clearance is Required ***
We have an opening for a Secret Cleared FPGA Design Engineer responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.
We encourage you to apply if you have any of these preferred skills or experiences: Experience with Zync UltraScale+ MPSoC or similar FPGAs, Vivado or similar tools; VHDL or similar languages.
REQUIREMENTS
- DoD Secret security clearance is required at time of hire.
- Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree and 3 years of job-related experience.
- Experience implementing cutting edge FPGA designs and achieving design closure to meet area, power, and timing constraints
- Integrating and closing timing on designs that include but are not limited to custom developed solutions with embedded hard & soft processors and with commercial & custom IP.
- Ability to work with cross functional teams as needed to define and refine FPGA design requirements.
- Support development teams with HW/SW integration and testing the FPGA design.
- Ability to multi-task and handle numerous jobs simultaneously.
- Designing, building, and producing low to high volume products
If you or anyone you know is interested in hearing more about this position, please email your resume and availability to Meredith Baldwin at Mbaldwin@geologics.com
*Rates listed are not a guarantee of salary/rate. Rate offered at time of hire will depend on many factors including education, experience, interview results and skill level
GeoLogics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran
Meredith Baldwin
Recruiter
(703) 891-6115
Mbaldwin@geologics.com
#CJ
group id: geotx
