Advanced FPGA Engineer

TITLE: Advanced FPGA Engineer for Crypto and Cross Domain Solutions

Required: Active Secret Clearance

RATE RANGE: $50.00/hr - $65.00/hr W2 contract with limited benefits

contract or contract to hire

ONSITE LOCATION: Dedham MA 02026

***No C2C, we can NOT work with outside agencies/vendors, and we can NOT do 1099-US

SECRET CLEARANCE IS REQUIRED***

Geologics is hiring an Advanced FPGA Engineer in Dedham, MA to be responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments.

REQUIREMENTS

• Active Secret Clearance
• Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.
• Highly proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
• Highly proficient in the principles and techniques of ASIC/FPGA design
• Highly proficient understanding of ASIC/FPGA processes
• Highly proficient knowledge of other related disciplines
• Keeps abreast of technology trends
• Highly proficient awareness of business objectives and Engineering's role in achieving
• Highly proficient in Microsoft Office applications
• Highly proficient in ASIC/FPGA design tools
• Highly proficient written and verbal communications skills
• Ability to think creatively
• Ability to multi-task
• Highly proficient skill in communicating issues, impacts, and corrective actions
• Highly proficient ability to recognize and clearly report information relevant to sound ASIC/FPGA design
• Highly proficient ability to develop and sell concepts and ideas
• Regular contact with senior levels of internal work groups
• Works under limited direction
• Contact with project leaders and other professionals within the Engineering department and with project teams across the company
• Some contact with external customers

RESPONSIBILITIES

• Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
• Determines architecture, system simulation and detailed design approach
• Defines module interfaces and all aspects of device design and simulation
• Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
• Creates test and simulation plans that establish functional criteria
• Verifies test results and analyzes performance
• May also review vendor capabilities, foundry technologies, device libraries and simulation tools
• Participates in the improvement of the ASIC/FPGA organizational processes
• Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
• Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
• Selects components and equipment based on analysis of specifications and reliability
• May provide leadership and/or direction to lower level employees
• Independently determines approach to solutions
• Contributes to the completion of major programs and projects
• Plans and executes project tasks for activities described above

Please respond to Meredith Baldwin with your interest level, recent copy of your resume and your availability for a call to Mbaldwin@geologics.com

*Rates listed are not a guarantee of salary/rate. Rate offered at time of hire will depend on many factors including education, experience, interview results and skill level

GeoLogics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran

Meredith Baldwin

Recruiter

(703) 891-6115

Mbaldwin@geologics.com

#CJ