Jun 20
Secret
Mid Level Career (5+ yrs experience)
$150,000 and above
No Traveling
Engineering - Electrical
Camden, NJ (On-Site/Office)
We have an outstanding Contract (12 months, possible hire) position for a Senior FPGA Design Engineer to join a leading Company located in the Camden, NJ surrounding area.
Pay Range: $90 - $115/hr
**US Citizenship is required.**
**Candidate must have the ability to obtain and maintain a Secret Security Clearance.**
Basic Hiring Criteria:
Bachelor of Science (BS) or Masters (MS) or Ph.D from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
Minimum 3-5 years of experience designing FPGA products with VHDL
Experience with Xilinx FPGAs and Vivado
Experience with Revision control system
Experience with Earned Value Management (EVM)
Desired Qualifications:
Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of the protocols: Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
Good written, verbal, and presentation skills
Pay Range: $90 - $115/hr
**US Citizenship is required.**
**Candidate must have the ability to obtain and maintain a Secret Security Clearance.**
Basic Hiring Criteria:
Bachelor of Science (BS) or Masters (MS) or Ph.D from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
Minimum 3-5 years of experience designing FPGA products with VHDL
Experience with Xilinx FPGAs and Vivado
Experience with Revision control system
Experience with Earned Value Management (EVM)
Desired Qualifications:
Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of the protocols: Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
Good written, verbal, and presentation skills
group id: 10285720a
