General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 13,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high performance team!
General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran
General Dynamics Mission Systems has an immediate opening for an Embedded Security ASIC / FPGA Senior Engineer. This position provides an opportunity to further advance the cutting-edge technology that supports some of our nation's core defense/intelligence services and systems. General Dynamics Mission Systems employees work closely with esteemed customers to develop solutions that allow them to carry out high-stakes national security missions.
The successful candidate must have a good working knowledge of the ASIC and FPGA development processes and development tools. Areas of concentration may include, Data at Rest, key management, encryption, secure/high assurance methodology, COMPUSEC, and configuration management. Working knowledge of Mentor or Synopsys ASIC simulation tools is a must.
In this role you will be:
Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
Determines architecture, system simulation and detailed design approach
Defines module interfaces and all aspects of devise design and simulation
Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
Creates test and simulation plans that establish functional criteria
Verifies test results and analyzes performance
May also review vendor capabilities, foundry technologies, device libraries and simulation tools
Participates in the improvement of the ASIC/FPGA organizational processes
Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
Selects components and equipment based on analysis of specifications and reliability
May provide leadership and/or direction to lower level employees
Independently determines approach to solutions
Contributes to the completion of major programs and projects
Plans and executes project tasks for activities described above
Education Requirements: Bachelor's degree in Electrical or Computer Engineering, a related specialized area or field is required (or equivalent experience) plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience.
Clearance Requirements: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
Able to develop with Xilinx, or Altera(Intel), or Microsemi igloo